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Senior Manager - RTL Design/ System Verilog/ Low Power Design
Hyderabad
Silicon Labs
Staff Engineer - AMS Verification (mixed signal SOCs or subsystems/IPs.)
Hyderabad
Silicon Labs
Senior Manager - Digital/IP Verification
Hyderabad
Silicon Labs
Staff Engineer - Analog/RF IC Design Engineer
Hyderabad
Silicon Labs
Staff Engineer - GLS Verification (10+yrs)
Hyderabad
Silicon Labs

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