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[PNN-651] SRAM Digital/Analog Circuit Design
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Vetrivel
R&D – Head of CMOS Integration M140
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Tata Electronics
PZO-327 VLSI - Synthesis and Static Timing Analysis - Senior Design Engineer
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Eteros Technologies
Senior Engineer – ASIC Verification - Bangalore, Hyderabad, Noida, Chennai, Ahmedabad, Pune - (GH730)
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EInfochips (An Arrow
DFT Engineers / Leads (Work from Office) | (RDP826)
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EInfochips (An Arrow

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